Title:
                                Evaluation and Solutions for Electrothermal and Mechanical Stress
                                    Challenges in Large-Chip Applications
                                Biography:
                                
                                    Earned a Master's degree from Harbin Institute of Technology. Joined ZTE Corporation
                                    in 2007 and possesses 20 years of experience in hardware development.
                                    Currently serving as the principal leader of the SI/PI team for wireless digital
                                    hardware and server products, with focused expertise in SerDes/DDR high-speed
                                    interface hardware design, evaluation,as well as SI/PI research related to chip
                                    packaging solutions and BBU/server architecture.
                                
                                Abstract:
                                
                                    With increasing chip size and power consumption, the electrical, thermal, and
                                    mechanical stress issues in chip applications are becoming deeply intertwined. This
                                    article introduces evaluation methods and corresponding solutions to address these
                                    electro-thermal-stress challenges.