CMOS mm-Wave Phased Array Design

Kai Kang received the B. Eng degree from the Northwestern Polytechnical University, China in 2002, and the joint Ph.D. degree from the National University of Singapore, Singapore and Ecole Supérieure D’électricité, France in 2008. Dr. Kang was with the Institute of microelectronics, A*STAR, Singapore as a Senior Research Engineer, and with Global foundries as a Principle Engineer, respectively. Since June 2011, he has been a professor at the University of Electronic Science and Technology of China. His research interests are RF and RF & mm-Wave integrated circuits design and modeling of on-chip devices. Dr. Kang has authored and co-authored over 200 international referred journal and conference papers, and was co-recipient of several best paper awards or best student paper awards in IEEE conference including Silkroad award in ISSCC 2018. He received the National Science Fund for distinguished young scholars.

Since mm-wave frequency bands are adopted in 5G communications, CMOS mmwave circuits and systems attract tremendous attentions because of its low cost and high integration capability. However, circuits designers have to face to many challenges of CMOS process, such as the high loss substrate, low Q passive devices, high noise, and limited gain and output power. This paper will introduce technique to overcome these difficulties to design high performance wideband building blocks as well as transceiver chipsets for 5G communication.